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International Journal of Mathematical, Engineering and Management Sciences

ISSN: 2455-7749 . Open Access


Handling Generalized Type-2 Problems of Digital Circuit Design via the Variable-Entered Karnaugh Map

Handling Generalized Type-2 Problems of Digital Circuit Design via the Variable-Entered Karnaugh Map

Ali Muhammad Ali Rushdi
Department of Electrical and Computer Engineering, Faculty of Engineering, King Abdulaziz University, P. O. Box 80204, Jeddah 21589, Saudi Arabia.

DOI https://dx.doi.org/10.33889/IJMEMS.2018.3.4-028

Received on July 13, 2017
  ;
Accepted on September 28, 2017

Abstract

This paper offers a novel treatment of the generalized Type-2 problem, a prominent fundamental problem of digital circuit design. We adapt the input-domain constraining technique via utilization of Variable-Entered Karnaugh Maps (VEKMs) together with careful employment of modern don’t-care notation. Our analysis covers the cases when an honest translator is possible or a sneaky translator is warranted, and is effective whether side inputs are absent or present, and for scalar or vectorial outputs.

Keywords- Digital circuit design, Generalized type-2 problems, Honest and sneaky translators, ‘Big’ Boolean algebras.

Citation

Rushdi, A. M. A. (2018). Handling Generalized Type-2 Problems of Digital Circuit Design via the Variable-Entered Karnaugh Map. International Journal of Mathematical, Engineering and Management Sciences, 3(4), 392-403. https://dx.doi.org/10.33889/IJMEMS.2018.3.4-028.