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International Journal of Mathematical, Engineering and Management Sciences

ISSN: 2455-7749 . Open Access


A New Approach to Design of Cost-Efficient Reversible Quantum Dual-Full Adder and Subtractor

A New Approach to Design of Cost-Efficient Reversible Quantum Dual-Full Adder and Subtractor

Heranmoy Maity
Department of Computer Science and Engineering, Symbiosis Institute of Technology, Nagpur Campus, Symbiosis International (Deemed University), Pune, Maharashtra, India.

Mousam Chatterjee
Department of Electronics and Communication Engineering, B.P. Poddar Institute of Management and Technology, Kolkata, West Bengal, India.

Susmita Biswas
Department of Electronics and Communication Engineering, B.P. Poddar Institute of Management and Technology, Kolkata, West Bengal, India.

Aritra Bhowmik
Department of Electronics and Communication Engineering, Dr. B.C. Roy Engineering College, Durgapur, West Bengal, India.

Bineet Kaur
Department of Computer Science and Engineering, Chitkara University Institute of Engineering and Technology, Chitkara University, Punjab, India.

Ashish Kumar Singh
Department of Computer Science and Engineering, Chitkara University Institute of Engineering and Technology, Chitkara University, Punjab, India.

Parna Kundu
Department of Electronics and Communication Engineering, NSHM Knowledge Campus, Durgapur, West Bengal, India.

Jagannath Samanta
Department of Electronics and Communication Engineering, Haldia Institute of Technology, Haldia, India.

DOI https://doi.org/10.33889/IJMEMS.2024.9.2.018

Received on September 14, 2023
  ;
Accepted on December 25, 2023

Abstract

This paper proposed the design and development of reversible cost-efficient innovative quantum dual-full adder and subtractor or QD-FAS circuit using quantum gate. The proposed circuit can be used as full adder and full subtractor simultaneously, which is designed using double Peres gate or DPG and Feynman gate or FG. The quantum cost, garbage output and constant input of the QD-FAS is 8, 1 and 1. Which is better w.r.t previously reported work. The QD-FAS circuit, as proposed, includes shared sum and difference terminals, as well as a carry-out and a borrow output terminal. Notably, this innovation showcases a remarkable 27.27% reduction in quantum cost. The improvement in garbage output is even more striking, showing a 50% enhancement. When assessing the overall advancement in quantum cost, it falls within the range of 27.27% to 66.66%. To confirm the viability of this design, extensive testing is carried out using the IBM Qiskit simulator. This design holds significant importance in a variety of applications, including quantum computing, cryptography, and the realm of reversible Arithmetic Logic Units (ALU).

Keywords- Reversible logic gate, Quantum cost, Adder, Subtractor, Qiskit.

Citation

Maity, H., Chatterjee, M., Biswas, S., Bhowmik, A., Kaur, B., Singh, A. K. Kundu, P., & Samanta, J. (2024). A New Approach to Design of Cost-Efficient Reversible Quantum Dual-Full Adder and Subtractor. International Journal of Mathematical, Engineering and Management Sciences, 9(2), 341-351. https://doi.org/10.33889/IJMEMS.2024.9.2.018.